The recent progress of electronics technology has been characterized by an ever-increasing complexity and circuit density of electronic circuits to be defined. Integrated circuit chips are being made with greater numbers of electronic components than before, and such chips are being interconnected to make ever-more complex electronic systems within a small package. As the circuitry defined on each semiconductor chip becomes more dense, the failure of any conductor within the circuit becomes, at the same time, more likely and more expensive, because the value of each chip increases with circuit density.
New generations of circuit packages require new techniques for interconnecting new chips of high circuit density. This requires substrates for supporting the chips which carry on them complex circuitry for interconnecting such chips. One approach, sometimes known as Advanced VLSI Packaging, or AVP, is to use silicon as a substrate for supporting semiconductor chips and to use the same techniques for making complex circuitry on the substrate as are used in defining circuitry on silicon chips. These new-generation substrates tend to be much more expensive than comparable ceramic substrates of the prior art, and, when a conductor is defective, the loss of the substrate represents a greater loss than before.
Because of these two technological trends, the tendency of semiconductor chips to become more complex and more expensive and the need for circuit mounting substrates that are more complex and expensive than before, there has developed a greater need for techniques for repairing spurious conductor breaks that may occur on either a chip or a substrate. Various proposals have been made through the years for controllably depositing metal interconnects for repairing accidental open circuits on chips or substrates, but for the most part these efforts have been unsuccessful. The conductors that are required must typically be a fraction of a micron to a micron thick, and only a few microns wide. There must, of course, be little deviation in their widths to avoid short circuits, and yet the integrity over their lengths must be sufficient to allow dependable current conduction.
The use of redundant circuits has been another solution to the quality control problem. With this scheme, two identical circuits of great complexity are both made on the same chip, the intention being that at least one of them will probably be without flaw. After testing reveals the presence of at least one good circuit, the duplicate circuit is isolated from the rest of the chip by destroying a conductive interconnection to the duplicate circuit, either through the use of a fusible link or by laser cutting of an interconnect. Cutting interconnects is much easier than creating interconnects on a chip, and for this reason there has been no commercial or standard use of a method for selectively connecting, rather than disconnecting, a "redundant" circuit to the remaining circuit of a system.
Thus, there has been a continuing need for a method for selectively depositing with high accuracy and precision dependable electrical conductors of extremely small width and thickness. It has been recognized that such technique would be useful for repairing conductors on both chips and substrates and for making selective interconnections within either chips or substrates. The U.S. Pat. No. 4,636,403 of Fisanick et al, granted Jan. 13, 1987, assigned to subsidiary companies of AT&T, and hereby incorporated by reference herein, describes a method for controllably depositing a spot or patch of material on a substrate, a process that is useful for repairing defects in photomasks. The process involves ramping, or gradually increasing, the power of a laser beam directed at a metal-organic material that overlies the photomask defect. Although the Fisanick et al. patent does not suggest any method for making conductors or repairs to conductors of integrated circuits or the like, applicants have found a way of making use of the Fisanick et al. method to provide such a function.